CS5368-DQZ【PDF 11/19 页】IC ADC 8CH 114DB 216KHZ 48-LQFP

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DS624F4

CS5368

4. APPLICATIONS

4.1

Power

CS5368 features five independent power pins that power various functional blocks within the device and

allow for convenient interfacing to other devices. Table 1 shows what portion of the device is powered from

each supply pin. Please refer to “Recommended Operating Conditions” on page 10 for the valid range of

each power supply pin. The power supplied to each power pin can be independent of the power supplied to

any other pin.

To meet full performance specifications, the CS5368 requires normal low-noise board layout. The “Typical

Connection Diagram” on page 9 shows the recommended power arrangements, with the VA pins connected

to a clean supply. VD, which powers the digital filter, may be run from the system logic supply, or it may be

powered from the analog supply via a single-pole decoupling filter.

Decoupling capacitors should be placed as near to the ADC as possible, with the lower value high-frequen-

cy capacitors placed nearest to the device leads. Clocks should be kept away from the FILT+ and VQ pins

in order to avoid unwanted coupling of these signals into the device. The FILT+ and VQ decoupling capac-

itors must be positioned to minimize the electrical path to ground.

The CDB5368 evaluation board demonstrates optimum layout for the device.

4.2

Control Port Mode and Stand-Alone Operation

4.2.1

Stand-Alone Mode

In Stand-Alone Mode, the CS5368 is programmed exclusively with multi-use configuration pins. This mode

provides a set of commonly used features, which comprise a subset of the complete set of device features

offered in Control Port Mode.

To use the CS5368 in Stand-Alone Mode, the configuration pins must be held in a stable state, at valid logic

levels, and RST must be asserted until the power supplies and clocks are stable and valid. More informa-

tion on the reset function is available in Section 4.5 on page 22.

4.2.2

Control Port Mode

In Control Port Mode, all features of the CS5368 are available. Four multi-use configuration pins become

software pins that support the IC or SPI bus protocol. To initiate Control Port Mode, a controller that sup-

ports IC or SPI must be used to enable the internal register functionality. This is done by setting the CP-

EN bit (Bit 7 of the Global Control Port Register). Once CP-EN is set, all of the device configuration pins

are ignored, and the internal register settings determine the operating modes of the part. Figure 4.13 on

page 30 provides detailed information about the IC and SPI bus protocols.

Power Supply Pin

Pin Name

Pin Number

Functional Block

4, 9

Analog Core

Crystal Oscillator

Digital Core

VLS

Serial Audio Interface

VLC

Control Logic

Table 1. Power Supply Pin Definitions

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